Random access memory (RAM) can be read from or written to in a nonlinear manner. RAM derives its name from the fact that any byte of memory can be accessed randomly instead of sequentially. RAM does not retain data in memory when power is removed.
Dynamic RAM (DRAM) stores each bit of data in a separate capacitor. DRAM derives its name from the fact that it must be refreshed periodically. Because of the way in which the memory cells are constructed, the reading action refreshes the contents of the memory. DRAM loses its data when the power supply is removed.
Fast page mode (FPM) RAM does not require a row address if the data is located in the previously accessed row. An older form of RAM, FPM RAM is being replaced by newer technologies such as EDO RAM.
Extended data out (EDO) RAM retrieves the next block of memory while sending the previous block to the CPU. EDO RAM is faster than FPM RAM and designed for bus speeds up to 66 MHz.
Burst extended data out (BEDO) RAM processes large blocks of data in an uninterrupted burst of smaller units. Each burst carries information about consecutive memory locations. BEDO RAM can handle four data elements in a single burst, enabling the last three elements to avoid the delays experienced by the first. BEDO RAM is suitable for bus speeds up to 66 MHz and can read data large blocks more quickly than EDO RAM.
Synchronous dynamic RAM (SDRAM) allows two pages of memory to be opened simultaneously. SDRAM synchronizes itself with the CPU’s bus and is capable of running at 133 MHz, about three times faster than FPM RAM and about twice as fast as EDO RAM and BEDO RAM.
Static RAM (SRAM) is more expensive than DRAM, but faster and more reliable. Unlike DRAM, SRAM does not need to be refreshed constantly; SRAM is refreshed only when a write command is performed. SRAM is most commonly used in the L2 cache for PCs. There are two types of SRAM: synchronous and asynchronous. Synchronous RAM is synchronized with the system clock. Asynchronous RAM is not.
The level two (L2) cache is a memory area separate from both the level one (L1) cache and the CPU. Data searches begin in the L1 cache, move to the L2 cache, then to DRAM, and finally to physical storage. Data is transmitted from the processor chip into main memory though the L2 cache. The L2 cache uses SRAM and aligns memory access speeds with the speed of the CPU itself.
Pipeline burst (PB) SRAM executes requests within a burst on a nearly instantaneous basis. PB SRAM is designed to work with bus speeds of 75 MHz and higher.
Video RAM (VRAM) is a dual-port RAM used in video accelerator cards and on motherboards that incorporate video technology. VRAM stores the pixel values in a graphical display. To refresh the display, the board’s controller reads from VRAM continuously. Unlike SRAM and DRAM, VRAM provides two access points to each memory cell. One port is used to refresh the display and the other is used to change the data to display. This dual-port system results in a doubling of bandwidth and faster video performance.
Windows RAM (WRAM) is a dual-port RAM used exclusively in graphical displays. WRAM is similar to VRAM, but provides up to 25% more bandwidth. WRAM includes a double-buffering data system that is several times faster than VRAM, resulting in considerably faster screen refresh rates.
Synchronous graphics RAM (SGRAM) is a single-port RAM used primarily with video accelerator cards. To improve performance, a dual-bank feature opens two memory pages simultaneously. SGRAM is used in 3-D video technology because its block-feature speeds screen fills and allows fast memory clearing. Three-dimensional video requires extremely fast clearing, in the range of 30 to 40 times per second.
Read-only memory (ROM) contains pre-programmed data and is either unchangeable or requires a special operation to overwrite. ROM retains data in memory when power is removed. A photosensitive material is etched to hold the required bit pattern.
MASK ROM is a type of read-only memory (ROM) that can be programmed only once. Manufacturers that produce high volumes of semiconductors often use MASK ROM because it is the most cost-effective ROM available.
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The form factor of any memory module describes its size and pin configuration. Most computer systems have memory sockets that can accept only one form factor.
Single in-line memory module (SIMM) provides a 32-bit data path. Devices that require wider data paths, such as Pentium processors, use a pair of SIMMs. Slower processors use a single SIMM. Pentium is a registered trademark of Intel Corporation.
Dual in-line memory module (DIMM) provides a 64-bit data path. DIMMs can perform the functions of two single in-line memory modules (SIMMs). Typically, Pentium processors use a single DIMM instead of two SIMMs. Pentium is a registered trademark of Intel Corporation.
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Clock speed is the raw MHz that the CPU (Central Processor Unit) operates at. For example, an AMD Athlon 1GHz has an operating clock speed of 1000 MHz, this is the processor's clock speed.
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The length of time it takes to transmit data expressed in terms of the minimum amount of time required for a memory to complete a cycle such as read, write, read/write, or read/modify/write.
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As data moves through a computer (e.g. from the CPU to the main Memory), the possibility of errors can occur, particularly in older 386 and 486 machines. Parity error detection was developed to notify the user of any data errors. By adding a single bit to each byte of data, this bit is responsible for checking the integrity of the other 8 bits while the byte is moved or stored. Once a single-bit error is detected, the user receives an error notification; however, parity checking only notifies, and does not correct a failed data bit. If your SIMM module has 3, 6, 9, 12, 18, or 36 chips then it is more than likely parity.
Error checking and correction (ECC) modules have an extra chip that detects if the data was correctly read or written by the memory module. If the data wasn't properly written, the extra chip will correct it in many cases (depending on what type of error).
Non-parity (also called non-ECC) modules do not have an error-detecting feature.
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processors, use a pair of SIMMs. Slower processors use a single SIMM. Pentium is a registered trademark of Intel Corporation.